red-ray wrote on 2026-02-25, 16:04:

Have a look at strapInfo0 VMI_HD2, my reading is that it would like to run @ 66 MHz rather than it is running @ 66 MHz. Does it change if you set things to run @ 33 MHz?

Jackhead wrote on Yesterday, 15:03:

Same value when i set 33MHz. For testing i had only the gpu on the pci bus, same value on 33 and 66.

Thank you, it's as I suspected then so strapInfo0 VMI_HD2 does not tell us what the PCI speed really is 🙁

Given this I suspect it's not possible the report the actual PCI speed for Voodoo 5 GPUs.

It might be worth asking the guy who developed the 6000 clone, he may know a way to tell the PCI bus speed the Voodoo 5 is using.

red-ray wrote on Yesterday, 14:20:

I just don't get it, I have made it abundantly clear I don't wish Disruptor's disruptive posts to be made any threads I start so […]
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red-ray wrote on 2023-04-07, 22:41:

I am bored with Disruptor asking questions and not providing the information I need to sensibly answer them so have muted Disruptor.

I just don't get it, I have made it abundantly clear I don't wish Disruptor's disruptive posts to be made any threads I start so why do they keep happening?

Nothing has changed, he still asks questions and fails to attach the SIV save files that I would need were I inclined to answer them.

Disruptor wrote on Yesterday, 10:06:

The [Machine] screenshot shows that internal L2 is not shown on this screen but the external cache is declared as L2 although it is a L3 here in fact.

As for [Machine] not reporting the L3 cache then clearly this is a bug in the motherboard BIOS so the BIOS needs to be fixed as it's the BIOS that set's up the SMBIOS data that SIV and other utilities report.

I am sorry again, but I include your requested debug files here. I just did not know how to generate them, I just had to scan 9 pages of the thread until I got the idea to crawl in your change logs.
I saved them from command line now. And now I see that what you call Menu has to be called by pressing Alt + Space. I haven't seen that, perhaps it is documented because it is smart.
I usually scan first and last page before I add comments.

These old boards were created long before K6-3 existed at all. So original BIOS did not care at all about a secondary internal cache of the CPU. Chkcpu's (Jan Steunebrink) J.3 BIOS patch just modifies the BIOS in that way that these processors would be initialized at all. Please don't expect too much from these old legacy machines. On some other parts your great (non-ironic!) programme gets L3 information at all.
And my comment on the memory allocation was not disruptive at all. It just was a hint to look on or change a malloc() or similar call.

Edit: SMBIOS outputs are from bad quality. I don't trust them on old machines. It is probably not your fault then. HWinfo is not better at all.

I hope this will help.
Peace.

red-ray wrote on 2019-08-22, 10:17:

[*]Assuming SIV starts OK I would like the save files generated do doing Menu->File->Save Local so I can check things in detail. I am happy for these to be posted, PMed or emailed.

Disruptor wrote on Yesterday, 16:53:

I am sorry again, but I include your requested debug files here. I just did not know how to generate them, I just had to scan 9 […]
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I am sorry again, but I include your requested debug files here. I just did not know how to generate them, I just had to scan 9 pages of the thread until I got the idea to crawl in your change logs.
I saved them from command line now. And now I see that what you call Menu has to be called by pressing Alt + Space. I haven't seen that, perhaps it is documented.
I usually scan first and last page before I add comments.

These old boards were created long before K6-3 existed at all. So original BIOS did not care at all about a secondary internal cache of the CPU. Chkcpu's (Jan Steunebrink) J.3 BIOS patch just modifies the BIOS in that way that these processors would be initialized at all. Please don't expect too much from these old legacy machines. On some other parts your great (non-ironic!) programme gets L3 information at all.
And my comment on the memory allocation was not disruptive at all. It just was a hint to look on or change a malloc() or similar call.

Given the very first post in this thread clearly specifies how to generate SIV files I am at a loss as to why why you specified "I just had to scan 9 pages of the thread until I got the idea to crawl in your change logs". All I can assume is that you are trying to be disruptive by posting misleading information. Please stop posting to threads I have started.

The K6-3 was launched on 22-Feb-1999, the BIOS date is 01/07/00 so you statement is incorrect. Please stop posting this incorrect disruptive information to threads I start.

Why don't you do as I asked and stop posting to threads I have started?

Given "Chkcpu's (Jan Steunebrink) " does all you wish for then I suggest you stop using SIV and use it.

I get the impression you feel you could develop a far better utility than SIV is and suggest you stop harassing me and do so.

I am hoping I won't have to reply to any more of your disruptive posts, but I won't be holding my breath.

I now have great additional informations for you.
It seems I've been wrong with the Windows 98 run. I am surprised! It does not show any significant difference in the 384 and 512 kB output too on the tests with 256 MB of RAM.

But!
I have done further tests that took me 3 hours of time:
1) Windows 98 native (256 MB RAM, 64 of it inside cacheable area of onboard L3 cache)
2) Windows 98 with MaxPhysPage=4000 in [386Enh] of system.ini (limits to 64 MB RAM)
3) Windows 2000 native (256 MB RAM, 64 of it inside cacheable area of onboard L3 cache)
4) Windows 2000 with /maxmem:64 in boot .ini (limits to 64 MB RAM)
5) Included all save files. DMI files could not be created on Windows 98.
Do you have your testing area below 64 MB of RAM or above?

Edit: Added the word "significant" and reordered tests to match the order of the pictures.

red-ray wrote on Yesterday, 17:49:

Given the very first post in this thread clearly specifies how to generate SIV files I am at a loss as to why why you specified […]
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red-ray wrote on 2019-08-22, 10:17:

[*]Assuming SIV starts OK I would like the save files generated do doing Menu->File->Save Local so I can check things in detail. I am happy for these to be posted, PMed or emailed.

Disruptor wrote on Yesterday, 16:53:

I am sorry again, but I include your requested debug files here. I just did not know how to generate them, I just had to scan 9 […]
Show full quote

I am sorry again, but I include your requested debug files here. I just did not know how to generate them, I just had to scan 9 pages of the thread until I got the idea to crawl in your change logs.
I saved them from command line now. And now I see that what you call Menu has to be called by pressing Alt + Space. I haven't seen that, perhaps it is documented.
I usually scan first and last page before I add comments.

These old boards were created long before K6-3 existed at all. So original BIOS did not care at all about a secondary internal cache of the CPU. Chkcpu's (Jan Steunebrink) J.3 BIOS patch just modifies the BIOS in that way that these processors would be initialized at all. Please don't expect too much from these old legacy machines. On some other parts your great (non-ironic!) programme gets L3 information at all.
And my comment on the memory allocation was not disruptive at all. It just was a hint to look on or change a malloc() or similar call.

Given the very first post in this thread clearly specifies how to generate SIV files I am at a loss as to why why you specified "I just had to scan 9 pages of the thread until I got the idea to crawl in your change logs". All I can assume is that you are trying to be disruptive by posting misleading information. Please stop posting to threads I have started.

The K6-3 was launched on 22-Feb-1999, the BIOS date is 01/07/00 so you statement is incorrect. Please stop posting this incorrect disruptive information to threads I start.

Why don't you do as I asked and stop posting to threads I have started?

Given "Chkcpu's (Jan Steunebrink) " does all you wish for then I suggest you stop using SIV and use it.

I get the impression you feel you could develop a far better utility than SIV is and suggest you stop harassing me and do so.

I am hoping I won't have to reply to any more of your disruptive posts, but I won't be holding my breath.

Oh, I'm reading your post now.
Sorry for me not finding the menu in your program. There is no button called "menu". As I have written, it took me a while to find out it can be activated by pressing Alt - Spacebar.

Sorry for testing your program.
It shows me that my L3 cache is working - but only when I limit my operating sytem to not use more memory than the cacheable area.
It is incorrect that Chkcpu (Jan Steunebrink)'s BIOS patch does all I wish. It does not care about external cache at all. It is not a measuring tool like yours.

Please don't call every post from me disrupting. Even when a surprise for you may be disrupting in fact.
Some of the information is quite interesting - if not for you then for other vogons, I'm sure.

And about the BIOS date. The BIOS date does not matter here because the original BIOS from that date did not support K6-3, K6-2+ and K6-3+ at all.
It is Jan "Chkcpu" Steunebrink's BIOS project which adds support for newer processors to BIOSes. BIOSes from manufacturers are considered complete when being released for the first time. There are just minor patches for errors and newer CPU releases but not updates you await or expect. That board is from 1997! It is a wonder that a K6-3 is running there at all.

Peace.

Edit: Added information about Jan Steunebrink's BIOS project.