Since it's a 99% faithful replica of the original design (I left out some pointless bits and made a couple of minor changes) it can be forked as it were.
I should note I know barely above zero about the following:
1) A lot of the parts were specific to this design. If you look at other boardviews over the bx/815 era they used different equivalent chips. Finding actually available ICs will be the first step.
(ideally find a combination that a real motherboard uses so that an existing bios will work)
2) Modern 12v pwm vrms using bog standard qfn mosfets and drivers.
2a) The CPU vrm should theoretically be able to supply 1.5ish to 3.4ish volts. That would enable pentium pro to tualatins. I think 25a would be enough but I haven't checked. Possibly using the extra 4pin atx 12v plug. Necroware's pentium vrm should work in theory with mods.
2b) vtt (signalling) of ~1.2 or 1.5v. Tualatins need ~1.2v. See specs.
2c) sdram selectable voltages 3.3v +/- a bit.
2d) agp 1.5/3.3v and maybe universal socket
2e) pci 5v/3.3v maybe
2f) -5v possibly for rare isa?
3) find actually available superio chips. Eg winbond/ite.
4) find an actually available hardware monitor chip.
5) Add possible integration. Sound? Sata? Adapter ICs like JMH330/JMH330s. M.2 sata? Hidman?
6) it looks like it's impossible to use a modern Soic8 bios, but the plcc32 should be fine.
Then... Board layout. Which I know approximately zero about.
Then finally an actual prototype.
If anyone actually makes it this far 🤣
I'd like to thank Scorp (necroware), Tevian (project backwards) , Rasteri (hidman), and Elvind (itx Llama) for inspiring me to have a crack at this.
**Notes area (editing bit): ---------------------------------------------------------------------------------------
* 440gx only effectively differs by 2 pins. GX supported 2gb so the extra ram line makes sense. I wonder if it really was NC on BX chipsets or just not documented...?
1Pin AE22 BX: NC (No connect) \ GX: MAA14 (ram address line #A14) 2Pin AE23 BX: NC (No connect) \ GX: MAB14 (ram address line #B14) 3The other seem to just be naming convention changes 4Pin AF3: BXPWROK / GXPWROK 5Pin AC22 BX: "CKE0/FENA" / GX: FENA 6Pin AF23 BX "GCKE/CKE1" / GX: GCKE
*440lx is completely different
* Rasz says VTT doesn't matter, and 3.3v only agp.
Last edited by myne on 2024-11-23, 04:23. Edited 4 times in total.
> I'm now fairly proficient in Kicad. I was a total noob.
We all were!
The way kicad manages libraries you need a sym-lib-table to link P2-3_era.kicad_sym to project https://docs.kicad.org/7.0/en/eeschema/eesche … _libraries.html
>The project specific symbol library table contains the list of libraries that are available specifically for the currently loaded project. If there are any project-specific symbol libraries, the table is saved in the file sym-lib-table in the project folder.
Slot1 B14 B15 is EDIT: thermocouple output diode junction in reference design, but I havent seen this supported in any of Asus boards. I remember plenty of boards with discrete thermistor on a Kapton ribbon or even plugged in on a cable either under SLOT1 or inside Socket370, like here JP4 https://theretroweb.com/motherboards/s/lucky- … -6abx2v-ver-1-2 Is this like with AMD SocketA where some early CPUs didnt have thermocouple/thermistor on die? or did mobo manufacturers ignore it because thermocouple reading is difficult compared to thermistors?
2b) vtt (signalling) of ~1.2 or 1.5v. Tualatins need ~1.2v. See specs.
need is a strong word 😀 they work fine at standard AGTL+ 1.5V on socket modded boards. AGTL is 1.25 V in theory, in practice everyone did 1.5V, even Powerleap Tualatin socket. I think it does clamp bus with SN74TVC16222a tho to be extra safe. https://tipperlinne.com/s370-dl.htmhttps://tipperlinne.com/p2b-dsvtt.htm
>The absolute maximum overshoot voltage for AGTL is specified at 1.78v
Then... Board layout. Which I know approximately zero about.
Lets start with basics. How many layers on contemporary boards? Abit BH-6 I have on hand looks like 4 layer.
4 layer jlcpcb 300 × 244 mm is ~$70 + $20 shipping which got very bad recently. I can no longer get $3-5 shipping to Europe 😐 6-layer adds only ~$10 at jlcpcb at the moment. https://cart.jlcpcb.com/quote?orderType=1&ste … encilLength=244
~$10 per board doing microATX.
PCBway is hilarious ~$190, no wonder they shower youtubers with ads 😀
Its crazy, but modern motherboards can go down to 6 layers with DDR5/PCIE4 https://www.msi.com/Motherboard/MAG-Z790-TOMAHAWK-WIFI while highest grade wank overclocker editions go up to 14.
I would not be comfortable routing this out without FEM simulations (power/singal integrity, crosstalk, EMF etc). Afaik Kicad doesnt support it yet, need Altium with expensive plugins.
Are you planning on throwing this on some project sharing site like github?
Last edited by rasz_pl on 2024-11-23, 11:59. Edited 1 time in total.
The way kicad manages libraries you need a sym-lib-table to link P2-3_era.kicad_sym to project https://docs.kicad.org/7.0/en/eeschema/eesche … _libraries.html
>The project specific symbol library table contains the list of libraries that are available specifically for the currently loaded project. If there are any project-specific symbol libraries, the table is saved in the file sym-lib-table in the project folder.
Slot1 B14 B15 is thermocouple output in reference design, but I havent seen this supported in any of Asus boards. I remember plenty of boards with discrete thermistor on a Kapton ribbon or even plugged in on a cable either under SLOT1 or inside Socket370, like here JP4 https://theretroweb.com/motherboards/s/lucky- … -6abx2v-ver-1-2 Is this like with AMD SocketA where some early CPUs didnt have thermocouple/thermistor on die? or did mobo manufacturers ignore it because thermocouple reading is difficult compared to thermistors?
Is that those 2 reserved pins that go to the MAX whatever?
need is a strong word 😀 they work fine at standard AGTL+ 1.5V on socket modded boards. AGTL is 1.25 V in theory, in practice everyone did 1.5V, even Powerleap Tualatin socket. I think it does clamp bus with SN74TVC16222a tho to be extra safe. https://tipperlinne.com/s370-dl.htmhttps://tipperlinne.com/p2b-dsvtt.htm
>The absolute maximum overshoot voltage for AGTL is specified at 1.78v
Is that those 2 reserved pins that go to the MAX whatever?
yep. I dont have (at least I dont think I do, past 40 everything is starting to blur 😜) any slot1 CPUs to measure if there is a thermocouple on those pins. I think I have a 370 celeron somewhere. Ill try to measure those pins next time I stumble on my CPU tray in my hardware hoard. I wonder if Its a situation where those pins were reserved on something like P2 233 and only later became thermocouple output.
Im definitely uploading this on my github 😀 at minimum to make a non functional mockup of P2B just as a toy. How do you want to be credited? just "myne"?
Im starting to wonder how to script something in Kicad to quickly produce 3D mockups of any random board by just giving it main component (cpu/ram/isa/pci/agp) locations. Would be great for theretroweb.
Oh. I just hit archive project. Guess it's not that thorough.
Right. Yeah I remember those dinky flex things.
Yeah, I realise what the voltages/signals are for. What I'm getting at is that the bx handles 1.5v signals on other lines, so maybe it would be OK on the agp lines too. Intel tend to plan ahead. The gx is identical to the bx except for 2 additional alleged no connects to double the ram support.
Go for it. Yeah, just myne and a link here.
Of course, I kinda want someone sometime to give me a board out of it, but I guess we'll see 🤣
Yeah, I realise what the voltages/signals are for. What I'm getting at is that the bx handles 1.5v signals on other lines, so maybe it would be OK on the agp lines too.
Intel tend to plan ahead. The gx is identical to the bx except for 2 additional alleged no connects to double the ram support.
440GX is also x2 3.3V only.
VT82C694X has separate VDD pins just for AGP slot I/O buffers supply. 440BX has a ton of 3V input pins, but datasheet just calls them all VCC and there is no way of knowing without ridiculous experimentation setup to determine what is what.
I mean that some parts of the chip do 1.5,so others might be able too. Especially if they were experimenting with what later became agp4x.
They do that. Test future things and either disable them with fuses, or just leave it since it doesn't exist in the wild anyway. I recall some mention of rdram in one of the bx era datasheets. It was never on a real board. It didn't exist commercially, but it was there in some way.
Iirc the via apollo was pin compatible with the bx if that helps.
Makes sense. It's easier to sell chips when they work in existing designs.
I get here because of reading "pentium pro" somewhere but not further explained here. Are you trying to design a new MB based on BX that would support all Ppro/PII/PIII CPUs? Via some slot1 variable modules? I only saw 440FX (or LX) boards that could operate with both Ppro and PII. Also interesting note about GX, maybe someone could.try replace BX by GX and add wires for extra RAM support 😀
[...] while PCI is reflected wave switching which I dont quite understand 😁😐https://en.wikipedia.org/wiki/Reflected-wave_switching sounds like RF black magic to me. No chance of running PCI at 1.5V logic, not that this would give you much as [/
This is a presentation from the Uni of Oslo that says the PCI bus is driven at 1.5v, and reflected-wave switching doubles the signal voltage to 3v to the card. 15cm max length for all PCI slots to the driver.
The wiki says a narrow strip of GND is directly underneath each line too. Unsure if that's connected all the way through to GND on each end, or only one end.
reading Pentium® Pro Processor GTL+ Guidelines VTT is still 1.5V. If FX can drive coppermines (I remember someone having such abomination on vogons) so should BX be able to drive ppros.
I get here because of reading "pentium pro" somewhere but not further explained here. Are you trying to design a new MB based on BX that would support all Ppro/PII/PIII CPUs? Via some slot1 variable modules? I only saw 440FX (or LX) boards that could operate with both Ppro and PII. Also interesting note about GX, maybe someone could.try replace BX by GX and add wires for extra RAM support 😀
Theoretically a BX with a good vrm could support all the way from the PPro 150 3.3v to Tualatin 1.4ghz 1.65v. I don't see any real reason fsb underclocking with the right clock gen isn't an option either.
Add in the practically universal driver support within 16/32bit OS' and true ISA and its probably the best base retro platform there ever could be.
Side note, the Pentium M seems to be GTL+ too. Wonder if it had latent bus backwards compatibility no one ever discovered... That'd be icing on the cake.
Other random thoughts...
There's nothing really saying that the bx and southbridge will refuse to run pci at 66. It's. 2.1 compliant and it just runs from the ck100 clock signal. Might break agp though. Not sure if there's another way to deliver the clocks.
Bidirectional Pci to pcie Bridge chips exist and have been used to run agp cards in pcie, or pcie cards in pci and agp.
Someone mentioned nvme on pci too.
So it's theoretically possible to add pcie to a new board...
The universal agp slot seems mostly straight forward. The only thing that isn't clear is the 2 sense pins at the back of the slot and how they trigger the vdd switch. It looks like logic might be required, not just a simple switch. The bx already supports 1.5v signalling Iirc, but obviously it won't run 4x or 8x - but it won't burn cards.
Still, all that is getting way way ahead of myself.
reading Pentium® Pro Processor GTL+ Guidelines VTT is still 1.5V. If FX can drive coppermines (I remember someone having such abomination on vogons) so should BX be able to drive ppros.
reading Pentium® Pro Processor GTL+ Guidelines VTT is still 1.5V. If FX can drive coppermines (I remember someone having such abomination on vogons) so should BX be able to drive ppros.
Yes its a nightly, fixed some bugs I was encountering when playing with 386RC-16 routing.
Second page done. I managed to import BLOCK DIAGRAM from PDF thru SVG conversion, still required tons of manual text input but hey, industrial grade autism helped me do it while watching some amateur racing. Page numbers are clickable and link to sheets.
You can also install both stable and nightly without them stepping on each other. Just needs some care in not accidentally opening and saving an older version's project unintentionally.
