Reply 40 of 45, by byte_76
Chkcpu wrote on 2025-06-11, 14:24:Hi byte_76, […]
byte_76 wrote on 2025-06-09, 16:57:Hi Jan, […]
Chkcpu wrote on 2025-06-09, 14:19:Hi byte_76, […]
Hi byte_76,
Great to hear the patched BIOS works as planned! 😀
However, getting the L1 cache in WB mode is another matter.
The Am5x86 article on my website, that you found earlier, also contains information on how to find the jumper that is connected to the CPU’s WB/WT# pin B-13.A first step is connecting this pin to Vcc to get the L1 cache in WB, but this will most certainly crash the PC. As you see from the article, a lot of other conditions need to be fulfilled as well, one of which concerns the BIOS.
The 1994 BIOS has only WB enable logic for the Cx486DX(2) and Intel 486DX2WB (P24D), so it doesn’t program the chipset for L1 WB support on any other CPU model, when you set WB in the BIOS Setup.So another BIOS patch is required, but this will need a full BIOS analysis. Success on this is slim however, as Ali 1429(G) chipset documentation is not available. Also the P24D jumper settings on this board are needed to know how to connect the HITM#, INV, and CACHE# signals between the chipset and CPU.
Not a project with a reasonable chance of success. But when I can find the time, I like to analyze this 1429G chipset L1 WB logic to at least contribute to @Rav’s Universal chipset patcher. project.
Let me know if you ever find the B870 board’s manual with P24D jumper settings. That would help enormously!
Jan
Hi Jan,
I think it is unlikely that I will ever find the manual for this board because it is not a very common board.
I have identified the jumper pin for B-13 but there is no 3.3v or 5V directly next to it. There is however 5.1V on a jumper pin nearby. (eg. if B-13 is jumper pin 1 then 5V is jumper pin 3 and pin 2 does not seem to be connected)
The board currently displays WB cache in CHKCPU when I install my Cyrix DX2-v66 and I think it also previously displayed WB when I installed my AMD DX4-100 SV8B but now it only indicates WT with that CPU.
Should I go ahead and connect jumper B-13 to the 5.1V pin? (Is it not risky to put 5V on that pin? I mean even the CPU voltage is only 3.3V and I'd rather not fry my CPU)
Hi byte_76,
The Am5x86 datasheet specifies this 3.45V Vcore CPU with 5V tolerant I/O. Apart from the supply voltage pins, the absolute maximum voltage on any pin is specified as Vcc +2.6V. So as long as you stay below 6.0V on pin B-13, you should be safe.
When you are going ahead with this L1 cache WB test on the Am5x86, try booting from a DOS 5 or 6 floppy. This is the best L1 cache WB coherency test I know, on any WB capable CPU.
Cheers, Jan
Hi Jan,
I have connected pin B-13 to the 5V pin.
I confirmed in your CHKCPU app that it does now indicate that the cache is configured in Write-Back mode.
I haven't had time to search for a floppy disk as I usually just use my Gotek drive which does not want to work with this board.
Other tools from Phil's benchmark suite do run without any issues. (Booted from an SD card with DOS 6.22)