So, i am seeing what is going on really.
I am afraid now that the above posts contain quite a few inaccuracies.

Check this out:

3 runs - 256/512/1024
Notice that SpeedSys does not recognize L2 cache - it reports only L1 and memory throughput.

With specific sets and configurations of chips i am able to get SpeedSys to report the presence of L2 cache.
So far was not able to make it see 512Kb single banked. Showing only 256 and 1024 Kb.
In these cases L2 cache is slower than direct memory access.

At the same time tweaking the L2 cache settings in the BIOS have impact on performance and system stability, even in the cases where SpeedSys does not recognize it, which is REALLY puzzling.
So weird.

This board frustrates me.
At some point soon i will have to clean house from bunch of retro junk and i know which motherboard will be on top of the stack. 😀

I don't understand which "specific sets and configurations of chips" were changed between the X5-160 run w/1024K that shows L2 as fast as main memory and between 1024K run that shows L2 slower than main memory. Are you able to clarify? This way people who use this POS board will know what to do and not to do.

You can avoid cleaning house by hiding your vintage trash. As long as I can fit my trash in the office closet or neatly tucked bins in the garage, the wife doesn't see it and doesn't know about it. Using a credit card only in your name helps too. I don't buy any of my retro hardware on our joint credit card.

Ok, i figured it out.
Had to step back and think for a moment about all the conflicting results.
Here is what is going on:

1. This motherboard/chipset offers unusually fast EDO memory access. Without proper documentation it is impossible to say how it works.
2. L2 cache wait states in BIOS affect performance regardless if L2 cache is present. I don't think it hints at internal caching or anything like that, but simply affects other wait states based on some dependency matrix.
3. This direct RAM access schema is faster than what the board does with external L2 cache available/enabled. It was already shown in previous posts - SpeedSys screenshots with memory metrics going up once outside the L2 cached range.

These 3 points can be verified with a simple test, by using Quake 1 frame rate (for a quick turnaround):

1                                                                     2-1-1-1    3-2-2-2
2L2 cache chips not installed              L2 cache disabled in BIOS  17.1 fps   15.3 fps
3L2 cache chips not installed              L2 cache enabled in BIOS   17.1 fps   15.3 fps
4L2 cache chips installed, not recognized  L2 cache disabled in BIOS  17.1 fps   15.3 fps
5L2 cache chips installed, not recognized  L2 cache enabled in BIOS   17.1 fps   15.3 fps
6L2 cache chips installed, recognized      L2 cache disabled in BIOS  15.3 fps   15.3 fps
7L2 cache chips installed, recognized      L2 cache enabled in BIOS   16.9 fps   15.2 fps

If you comprehend the lines properly it will become obvious to you what is what.

---

Three more notes before we close this M918i chapter:
1. This motherboard holds the title "most picky assembly about L2 cache chips", by far. Meh.
2. The previous finding about DRAM WRITE TIMING = FASTER (best FASTEST) when 64Mb or more installed memory -> performance worsens.
3. The performance metrics outlined in the original post about M918i hold true, since they were taken without external L2 cache.

---

Feipoa, i may follow your advice to keep this piece of rust in a dark corner instead of ditching it, but as of today i am so fed-up with it that just want it out of my sight.

---

User Tyrhus was able to achieve much better results with this motherboard, documented in this post.
A second round of investigation may be required based on his findings.

Something I have realised over the years is that no chapter on any particular motherboard is ever fully closed.

It is possible that the FinALi has some sort of cache built into the chipset. I recall seeing this on one 386 or early 486 chipset and it was documented. I just forget which chipset it was now. The in-chipset cache was rather small.

Didn't you say your other M1487 based motherboard exhibited typical behaviour in terms of the L2 cache and memory timings? If you cross reference those results with the m918, does the m918 display any faster memory benchmarks? I kind of recall all M1487 boards not having steller L2 performance, implying that the DRAM controller on this board (or chipset in general?) is just exceptionally fast. If your other M1487 board has any improvement of L2 speed compared to its DRAM speed, and the DRAM benchmarks on your other board equate to the M918's, then I suspect the m918 has an incorrect cache implementation. These boards sold with fake and no-L2 cache, so I bet the owners of the company didn't want to pay the designers any more salary to get it working correctly.

In looking at my notes in the Gigabyte GA-5486AL, I see there are working 50/60 Mhz settings, but for 66 MHz, I have noted that it won't boot, but there is a jumper for 66 Mhz. There is also a jumper for 80 MHz. I have noted that the system is fixed on write-back L2 mode and there is no write-through option.

I have notes that "the best the system can do at 4x40 is:
256K + 32 MB (single stick) is OK with FASTEST timings
or
512K + 64 MB must use FAST

If left at 33 MHz, the ALi has the fastest memory read throughput.

I have some cachechk results tabulated for 4x40 using:

Fastest timings
L1 = 165 MB/s
L2 = 73 MB/s
RAM (read) = 54 MB/s
RAM (write) = 54 MB/s

Fast timings
L1 = 165 MB/s
L2 = 73 MB/s
RAM (read) = 41 MB/s
RAM (write) = 54 MB/s
,
So you can see with these results that the L2 cache is indeed faster than DRAM; this supports the theory that the m918 didn't finish their cache implementation. Are your cachechk v7 memory read speeds on the m918 at 4x40 equal to 54 MB/s? If they are faster, then that is very interesting. Unfortunately, I don't have any speedsys results written down in my notes.

I think not being able to use at least 64 MB with the fastest timings turned me off from this board. If there was a working L2 WT mode, then I'd have been a little more interesting. I have plans on trying to use other motherboard's BIOSes with the Gigabyte and m918 to see if I could improve upon some of their limitations.

feipoa wrote on 2021-08-08, 07:34:

Something I have realised over the years is that no chapter on any particular motherboard is ever fully closed.

Agreed. My "case solved" is for the caching behavior.

feipoa wrote on 2021-08-08, 07:34:

It is possible that the FinALi has some sort of cache built into the chipset. I recall seeing this on one 386 or early 486 chipset and it was documented. I just forget which chipset it was now. The in-chipset cache was rather small.

This one ?

feipoa wrote on 2021-08-08, 07:34:

Didn't you say your other M1487 based motherboard exhibited typical behaviour in terms of the L2 cache and memory timings? If you cross reference those results with the m918, does the m918 display any faster memory benchmarks? I kind of recall all M1487 boards not having steller L2 performance, implying that the DRAM controller on this board (or chipset in general?) is just exceptionally fast. If your other M1487 board has any improvement of L2 speed compared to its DRAM speed, and the DRAM benchmarks on your other board equate to the M918's, then I suspect the m918 has an incorrect cache implementation. These boards sold with fake and no-L2 cache, so I bet the owners of the company didn't want to pay the designers any more salary to get it working correctly.

Abit PB4
As i mentioned above - it behaves properly. Slower memory access compared to M918i, but overall performance than it M918i. It is a much better all round system for sure.

feipoa wrote on 2021-08-08, 07:34:

In looking at my notes in the Gigabyte GA-5486AL, I see there are working 50/60 Mhz settings, but for 66 MHz, I have noted that […]
Show full quote

In looking at my notes in the Gigabyte GA-5486AL, I see there are working 50/60 Mhz settings, but for 66 MHz, I have noted that it won't boot, but there is a jumper for 66 Mhz. There is also a jumper for 80 MHz. I have noted that the system is fixed on write-back L2 mode and there is no write-through option.

I have notes that "the best the system can do at 4x40 is:
256K + 32 MB (single stick) is OK with FASTEST timings
or
512K + 64 MB must use FAST

If left at 33 MHz, the ALi has the fastest memory read throughput.

I have some cachechk results tabulated for 4x40 using:

Fastest timings
L1 = 165 MB/s
L2 = 73 MB/s
RAM (read) = 54 MB/s
RAM (write) = 54 MB/s

Fast timings
L1 = 165 MB/s
L2 = 73 MB/s
RAM (read) = 41 MB/s
RAM (write) = 54 MB/s

These numbers are much higher than Abit PB4 and M918i for sure, not sure if it translates to perf tho. Do you have anything there ?

feipoa wrote on 2021-08-08, 07:34:

So you can see with these results that the L2 cache is indeed faster than DRAM; this supports the theory that the m918 didn't finish their cache implementation. Are your cachechk v7 memory read speeds on the m918 at 4x40 equal to 54 MB/s? If they are faster, then that is very interesting. Unfortunately, I don't have any speedsys results written down in my notes.

Yes, M918i feels unfinished.

feipoa wrote on 2021-08-08, 07:34:

I think not being able to use at least 64 MB with the fastest timings turned me off from this board. If there was a working L2 WT mode, then I'd have been a little more interesting. I have plans on trying to use other motherboard's BIOSes with the Gigabyte and m918 to see if I could improve upon some of their limitations.

Agreed. Paper tiger 😀

I'm not sure what chipset is on that motherboard you linked. It wasn't that motherboard per say I had noticed the integrated SRAM on, but could have been the same chipset. If I knew the chipset model, it might spark a dormant memory.

I did not jot down the gaming benchmark results for the GA-5486AL, so I would have to rerun the tests at some point. What cachechk memory read/write speeds did you get on your abit?

The Octec Jaguar V motherboard is based on Micronics MX82C305/306 - it comes with 8kb l2 cache and some hackery for improved memory access. Not the best performer out there, but the whole package works pretty well.

I rarely use cachecheck. Can run it in one of the next days, along with umc dos/win driver test.

I don't have a board based on a any micronics chipset, so it wasn't that one.

That's Macronix. Micronics is a different company.

The other chipset I am aware of with internal cache is the SiS Rabbit, but it's really tiny...only 128 bytes (not kilobytes). You can either use this, or configure it to use normal external cache (you can't use both at the same time).

The SiS Rabbit may very well have been the chipset I was thinking of, but I'd have to check all my MB manuals to be sure.

Anonymous Coward wrote on 2021-08-09, 13:01:

That's Macronix. Micronics is a different company.

Yes, of course.
Typing on a tablet is very error prone.
Even "Octek" was spelled wrong. 😀
Thanks for pointing out.

Adding one more motherboard to the 486 at 180MHz - an exercise in practicality list:

Shuttle HOT-433 version 4.
The latest revision of the series.
Looks like cost reduction was a factor for the design - L2 cache was cut down to maximum of 512Kb soldered on the PCB, from 1024Kb in previous implementations. But that does not seem to matter - details below.
Supports up to 128Mb RAM and the full range of 486 class CPUs.
Lots of jumpers for CPU selection. Most other boards in this class have 2 to 4 times less jumpers for that.

--- Am5x86 at 180 MHz (3x60)

Need to supply 3.45V to CPU, or no boot. This is a motherboard requirement, because the same CPUs work just fine at 3.3V in other systems.
After long-enough period of time between two sessions, i need to temporary switch to one of the officially supported FSB frequencies, such as 40 or 50 MHz for the board to light-up.
After that can go back up to 60. This is mildly annoying and kind of a deal breaker if this boards need to go inside a PC case.

512Kb L2 cache is impossible.
First i thought that the soldered on-board chips may be lacking. Installed sockets and tried extra hard with several sets of trusted chips.
No chance. Clearly a motherboard limitation.
256Kb worked well. Relatively easy to achieve.
12ns TAG.
CACHE SPEED OPTION must be 2-2-2 (best is 2-1-2), or post does not complete.
Spent plenty of time swapping around trusted 64Kx8 chips to see if can get workable configuration at 2-1-2.
No chance. Another motherboard limitation.
For reference, the same chipset works fine with tightest timings at 180MHz in Biostar UUD. So it is possible.

Because of the 256Kb L2 cache only, installing more than 32Mb RAM lowers performance. Probably because of uncached address range.
Some boards suffer by that, while others don't. For example LS C2/D, UUD, VLI, PVI don't have this problem, while HOT-433, M919, M918, etc., do.
This is curious and needs closer inspection, but that will be for later. Anyway.
Used 32Mb 50ns EDO RAM.

Latest AMI BIOS with the weird windows UI.
For interactive DOS graphics and Windows - settings can be on max, except the mentioned above CACHE SPEED OPTION = 2-2-2 and DRAM READ WAIT STATES = 1 (best is 0).
In this configuration BIOS hangs at save/exit. Needs hard-reset.
The system can be used for gaming and casual computing in this configuration. Performance is pretty good.
For complete stability (passing complex compute) the next adjustments are required:
CACHE SPEED OPTIONS = 3-2-3
DRAM READ WAIT STATES = 1
DRAM WRITE WAIT STATES = 1
Surprisingly performance didn't change that much (see charts below).
Also, this config fixes the issue with hanging BIOS on save/exit.

UMC IDE controller makes the system unstable, even at its most conservative settings. Tested without it.

Write access issues with CF cards bigger than 8Gb in size. Fine otherwise. Annoying.

SpeedSys with BIOS settings for complete stability:

benchmark results

Performance is pretty good - in line with the best out there.
At the same time - the boot issue between sessions, write access with some CF cards and not able to squeeze the most out of the chipset at complete stability, are concerning.

--- Am5x86 at 160MHz (2x80)

Details in this post.

--- Am5x86 at 160MHz (4x40)

This went easy.
512Kb L2 cache is relatively easy to achievable, but at the expense of lowered wait states. Otherwise the system does not complete post, or is unstable. With lowered wait states performance is worse than 256Kb + all settings on max. Obviously - used 256Kb.
32Mb EDO 50/60ns RAM - again - over that perf tanks.
All BIOS settings on MAX.
UMC IDE driver behaves properly. But didn't take a note about the exact disk speed used. It was up there - 16 or 17 (documented max is 17, undocumented 18).
Nothing more to say really - things work as expected.

Speedsys.
UMC IDE driver helps.

benchmark results

Not the best performer out there, but low maintenance and just works.

--- Intel P24T at 100MHz (POD100, 2.5x40)

Details available in the combined POD100 post.
In short - everything works great. All BIOS settings on max.
Intermediate performance.

benchmark results

I spent most with versions 1-3 of this board because of the 1024K option. At the time, I was pushing for 256 MB of EDO RAM, 1024K, and an Am5x86 at 160 MHz w/fastest sram/dram settings. At one point, I thought it was running well, but the next day booted it up and received memory errors. Tried different v1-3 boards, but encountered the same memory issues with these settings. Then I went for the v4, but 512K and 160 MHz w/fastest timings wasn't stable. Also, both PS/2 headers don't work out of the box. It looks like you also encountered the issue with needing slower wait states w/512K.

Yes. I remember you mentioning that recently.
Thanks for the more detailed definition here.
We are clearly seeing the same symptoms.
HOT-433 version 4 is actually doing pretty well (at 180MHz at least) with 256kb L2 cache only, but that hurts perf with over 32Mb of system memory.
Did you stumble somewhere upon plausible explanation why the behavior of the same chipset varies in that regard between different motherboards ?

For example, few days ago I succeeded to get Biostar UUD version 2 running completely stable at 180MHz with 128Mb RAM and tightest BIOS timings (updated the post at page 18 accordingly) - turning it into a 180MHz monster. 😀
EDIT: Until now i was not able to get the system beyond 64Mb RAM.
Apart from me bragging here, my point is that the UUD guy and all late SiS boards (as far as I can tell) don't suffer from performance degradation with lots of memory and limited amount of L2 cache, while others take a dive if over 32Mb RAM installed.
A question that is growing on me these days.

Even on the UUD, it is hard to get 512K single-banked stable at 4x40 Mhz and the fastest timings. I think you had to fiddle around with various sram modules. This is something I haven't achived on this MB, which is why I switched to double-banked. I have found that nearly all PCI 486 motherboards don't tolerate 512K single-banked with 40+ MHz very well at 2-1-1-1. For this reason I avoid boards without two banks.

For the HOT, did you try FPM beyond 32 MB? Are you not able to do 64 MB in L2:WT mode? If not, I am not surprised. When on the verge, doubling the RAM somehow looses the race. If a 486 PCI board can't run with 64 MB well, I move on.

Running the UUD at 60 Mhz w/2-1-1-1 is indeed impressive. Can you do that with 512K single-banked, or just 256K double-banked? I suspect the UUD does so well due to short trace lengths, and/or perhaps better impedence matching.

In general the UMC chipset is flaky with more than 256Kb L2 cache.
Too many motherboards based on it have this problem, which kind of confirms it.

Yes, tried HOT-433 with FPM memory. It is slower than with EDO. Has the same perf issue when over 32Mb RAM installed, regardless of L2 being in WT/WB mode.

As for amount of memory in 486 PC these days - agreed with you - at least 64Mb RAM, or get out of here.
Back in the mid 90ies i upgraded from 8 to 12 and then to 20Mb (!!!) of system memory.
It was outrageous. Almost inappropriate. Friends where fascinated watching the memory counter at startup.
Today - meh. 20Mb ? Cannot be bothered.
😀

UUD at 60MHz is impossible with 512Kb using 2-1-1-1. Need to increase the wait states = bye bye perf.
That piece of hardware is put together really well.
I have 2 more boards to check at 180MHz, but it is already clear that it will be UUD or LS D, with UUD having the edge atm since LS D cannot do reliably 128Mb with tightest DRAM wait states.

FYI, I replaced the SOJ SRAM on the Lucky Star LS-486E rev.D with 10 ns Cypress chips. At 66 MHz, I was unable to use any faster timings with 10 ns. vs 15 ns. I'm at 3-1-3 with DRAM:fastest. 3-1-2 boots DOS, but Quake returns "bad surface extents". At 3-1-3, I get 19.6 fps in Quake. I have not evaluated if the 10 ns modules allow for fastest timings with other FSBs.

Soldering on 9 SOJ-28 without solder paste was not fun. My solder paste had expired. Anyone know how long solder paste is still usable past the expiration date when stored at 20-25 C ?

For hand work and rework it doesn't really expire, the fluxes evaporate off a bit, so if it gets too stiff, just add a touch of liquid flux or a couple of drops of isopropyl alcohol. What expires is it's ability to have precise properties necessary to perform in an automated PCB production scenario where it is stencilled onto PCB, leaving "just exactly the right amount" on the pads, too sticky there's too much, too wet it bleeds under stencil, then stick the components down such that the vibration of the line doesn't send them skittering, and melt precisely on schedule in the reflow oven. If you're not doing a process that relies on any of that, just use it whatever the date is, re-wet it if it dries out.

Edit: The comments on this article are insightful on that point https://hackaday.com/2021/02/02/learn-bil-her … sembly-process/

I also swapped the 15ns L2 cache chips on the LuckyStar rev:D motherboard with 10ns ones. But i did it entirely with the heat gun and fresh paste. Otherwise is just torture.
They for sure improved stability at 60 and 66MHz. Profiled this carefully. Need to update the original post and some of the following charts.
But yes - at 3x66 with AMD DX5 CPUs i cannot go below 3-1-3 for the L2 cache. Things get very unstable.
Captured on video a quick run with Quake 1 + SpeedSys + BIOS settings. Another 21.8 fps result in Quake 1.

As for how quickly the soldering paste goes bad - in my experience - if not properly packaged - few months.
By proper packaging i mean - put the syringe inside (deflated from air) plastic bag with zipper and store it in a drawer.

---

Agreed with BitWrangler.

OK, I guess I'll pull out my expired paste and see how it acts. I have this NexGen motherboard that I wanted to replace the SRAM on to upgrade from 256K to 1024K. It is a rare board so I am a bit hesitant. LS-486E's are plentiful.

An issue I have found when replacing anything surface mount is the issue with getting the pads the same level (height). If all IC leads aren't all touching the metal pads, the solder doesn't easily flow into the air gap between the IC and the pad. Ensuring the solder is suspended in this cap is fairly easy to do with a soldering iron, but tedious.

Thus it seems to me that the best approach for rework of SOJ is to completely remove any trace of the old solder from the pads, esp. when working with paste and hot air. Is this what you all are doing? I suppose one could manually re-tin all the pads and use hot air to melt all the solder simultaneously - this would bring the IC down and disregard the need for even solder blob heights, however the IC will likely not land square.