@pshipkov
Excellent work on the 386 hardware. Your results are invaluable and your time is much appreciated! Thank you for this Herculean effort-it has been quite exciting, to say the least, and I am very interested in seeing where your next stop is hardware-wise!

Thank you for doing this indeed! 😁

----
Before sharing my saga with the ALD PCI5433 below, I just want to briefly mention something interesting. The other day, I was working on my Soyo 4SA2. It had a mangled 72-pin SIMM socket, which I promptly replaced. It's been fine since, and I could not help but notice something fascinating, regarding the reason-perhaps-for its average performance: the Dirty TAG is not enabled! CTCM 1.5b clearly shows this, regardless of the L2 size and BIOS settings for WB. As long as WB L2 is enabled on this board, it is in always dirty mode! In other words, it suffers from the same problem as the ASUS VLI, pre-modded BIOS by Feipoa.

Using MCSIS496.COM, a tool written by a member here that can modify chipset registers of the SiS496 BIOS, I set out to remedy this. I haven't gone so far as to mod the BIOS (yet), but for now, this suffices. I wrote a small script in batch that calls MCSIS496, enables the 7+1 TAG configuration by modifying Register 42h, BIT 2. Setting that to 1 enables such a configuration. The dirty TAG cannot immediately be enabled, otherwise the system will hard-lock. I presume that the cache has to be flushed first, so, in an attempt to do such and verify the results at the same time, my script calls CTCM 1.5b (which I keep in the MARKS folder of DOSBENCH, but this can be changed). It then runs CTCM to demonstrate that the TAG is off and cycle the cache, and then calls MCSIS496.COM to set BIT 3 of Register 42h to 0, which enables the dirty TAG operation. CTCM 1.5b is called once again, to demonstrate higher speeds, and then the script quits. It works well enough. I've attached the files here, if anyone wants to give it a go. Just be sure to either edit the batch script to call CTCM 1.5b at the location where you keep it, and the same goes for MCSIS496.COM.

The script I wrote auto-sets CTCM 1.5b for your L2 cache amount based on a selection menu. Do note that CTCM 1.5b requires the /l2 flag to properly detect 1024k L2 (and sometimes even 512k).

----

A while ago, I happened upon perhaps one of the oddest 486 boards to date.

This story starts with ALD-the manufacturer of this board. ALD's designs are perhaps some of the strangest out there, notably defined by cheap, highly-integrated assemblies. One rather infamous ALD board is the VL4200, a single-chip VLB board based on the 93C413 chipset. It supposedly can support cache, but comes laden with fake cache ICs and does not seem to support real cache, even when modified.

I realized this thing needed a manual, so I emailed ALD. Their website still exists, and it looks to be straight out of 1997. Their support actually had the manual, and it has since been uploaded on TRW as a PDF. Talk about a good (and quite weird) start to an otherwise fascinatingly strange saga.

The ALD PCI 5433 is a based on the single chip ALD 93C488 chipset, and boasts numerous features that sound to be little more than marketing fluff. One such feature is the "latest Pentium class technology...Pipeline Burst Synchonous SRAM Cache...," which happens to distinguish this fellow as the only known 486 board with pipeline burst L2 cache. This made such an assembly quite interesting, as it raised numerous other questions, such as: How flexible is it? How true is the claimed PCI 2.1 compliance, and how is its PCI implementation in general? Is the ALD 93C488 something that happens to be re-labelled, or is it truly an in-house single-chip 486 solution with all the bells and whistles, from WB L1 support to pipeline burst cache support to even EDO support?

Well, it's probably best to sum these answers in a few words: yes and no. Yes, it's an interesting board and, comparatively, it is decently fast. To say that it is speedy is a stretch; it's probably in the lower tier of SiS496/UM8881 boards, and that might be the whole story for you right there. However, as they say, there's always more to the story-and with this ALD fellow, there certainly is. I suspect that more can come of this assembly in the future.

As to the other questions, let us examine them one-by-one:

• It's not that flexible. It is certainly fast as far as PCI throughput, but that's about where the fun ends. Pipeline burst L2 should in theory support higher FSB speeds, but the silicon driving the assembly seems to be rated at a cap of 40MHz. That's not great, as pipeline burst cache loses out to asynchronous cache as far as timings go, at least at slower speeds. It is the scalability and speed at scale that makes pipeline burst L2 desirable; neither of those facets of operation is found here.
• The PCI implementation can be characterized as "okay." It is not bad, speed-wise, but the sheer bus throughput is not enough to overcome the limitations of the chipset. Yes, it appears that the PCI implementation is marginally faster with respect to bus transfers than the SiS496 and UM8881F chipsets. That's not precisely saying much as, again, the story with those boards, as shown by pshipkov and Feipoa, amongst the others here, is speed at scale. The UM8881F chipset really comes into its own at 60/66MHz, as does the SiS496. It's a shame to say that the ALD 93C488 probably would be on par with those fellows at said speeds, but its design is inherently limited by the market segment it was meant to target.
• Yep, the ALD 93C488 appears to be its own thing. That's neat.

This board has driven me positively mad; the otherwise standard AMI WinBIOS is obscenely complicated, with numerous features not exposed on most other "normal" boards facing the end user. There's listings for numerous configurable options, some of which prove interesting, and others of which prove absolutely confusion-inducing. I have provided a few pictures below to elucidate the point at which I am trying to reach; that this board, at its very core, is absurdist. The manual explicitly notes, "For optimization purpose[sic], most of the BIOS parameters have been pre-determined[sic] by the manufacturer." They are not even close to joking. Changing even more than a few of the BIOS settings from the "Optimal" configuration setting can hang the board in BIOS. I found the most stable changes that improved performance to be as follows:

STAGGERED REFRESH MODE = ENABLED
REFRESH MODE TIMING = 1 CLK
RAS PRE-CHARGE TIME = 3 CLKs
RAS ACTIVE TIME = 3 CLKs
FAST MODE READ CAS ACTIVE TIME = 1 CLK
PCI/ISA MASTER EXTRA WAIT-STATE = 0WS
PCI WRITE BUFFER = ENABLED
HOST ADDRESS/DATA XFER SPEED = FASTEST
ISA FAST DMA CYCLE = ENABLED
PCI/ISA MASTER READ WS = 0ws

There are two cache arrangements: Flow Through and Pipeline. I have results with both attached below. Flow Through seems slightly faster, and that's the story with that. Further, it's worth noting that EDO support works, which is nice. It is pretty flawless, unlike with some other 486 boards. The onboard IDE is very decent; it is an LGS Prime 3Bit is seemingly integrated into the chipset, like with the Intel Aries. The LGS Prime 3B is an ISA-based Super I/O controller. My bad! With a CF card, it seems to offer very fast speeds in DOS, and no driver is required. Undoubtedly, that is a large plus, for when conventional memory needs to be prioritized.

Does anyone know what the difference is here, as far as Flow Through and Pipeline are concerned? The manual and chipset databook are silent as to this.

This board notably supports 25MHz FSB, 33MHz FSB, and 40MHz FSB. I am not certain if this ALD single-chip chipset can support 50MHz FSB, and would be rather inclined to believe that it probably cannot. The integration of this hardware is notably tight, so much so that it suffers greatly at the expense of its design. It is not per se a bad design, but ALD certainly marketed this board as a cheap non-Pentium alternative. The date code of 1996 probably support this fact, and I would not mind staking a claim that this board served as ALD's low-end offering. They did have some Pentium boards, and even those are comparatively cheap when placed against other manufacturer's assemblies; that being said, there's no doubt in my mind that this board was not made by a premium manufacturer. The PCB is somewhat cheap, and I am positive that the keen-eyed amongst you has noticed the superficial damage to the lower-right corner. This guy had a hard life, and the truth could not be any simpler than that. Sometimes, I find this board a bit cranky and unwilling to POST; that is usually after hard-locking it from what it probably cosniders to be gratuitous attempts at changing the BIOS settings.

For the tests, I utilized the following configuration:

• Am5x86 at 160MHz
• WB L1 cache
• Flow Through and Pipeline L2 cache
• Matrox Mystique (which should be about the same as pshipkov's Millenium, as far as DOS is concerned)
• 1 x 32MB 60ns EDO SIMM
• 512MB BR&TD CF Card

Results follow below. DOS performance was enough for me to call an audible on this one as far as further testing goes. I can provide performance numbers for Windows if so desired, and I can try 3D rendering, but it seems to me that this assembly is just too far out there to be worth examining further. It is undeniably very cool and fast enough that it makes some sense to use, but it is not nearly as exciting as the LSD or UUD boards.

I can test other cards/settings as desired. The slough of aforementioned crazy BIOS settings is attached here; if someone has any suggestions about where I can start tightening things up further without losing stability, I am all ears.

Great info thanks.
Been waiting for this one.
(Linked from the directory in the first page. Updated the 486 "charts".)

An unusual assembly indeed.
High level of integration, next gen (for 486) caching techniques. Very strong on paper (thanks for the datasheet).
But interactive graphics perf is clearly lacking. Good IDE controller.

Couple of questions:
You said - the oldest 486 motherboard towards the beginning of the ALD review. How to read that ?
Did you consider gluing another 256Kb of level 2 cache ?
Wonder what a 3DSR3 test will show ? Sometimes boards shine in offline compute while struggle with interactive graphics, or the opposite.

Glad to be of service!

I apologize that it took so long to get the numbers squared. The board itself proved to be part of the issue, in that it just had so many quirks and problems. Getting this board setup to where it worked well was 90-95% of the battle; that's not to speak discouragingly of the hardware, but instead to highlight the fact that ALD simply did not produce a refined product and chose to leave this board a bit rough around the edges for the sake of integration.

The big problem with PLB L2 cache is that it's just not good enough for a 486. That sounds a bit antithetical, but the reality is that this board runs the cache at 3-1-1-1 timings. The whole story kind of starts and ends right there, but I think that the reason for this board's oddities go a bit further. I stumbled upon an old comment from AnonymousCoward that suggests this board's chipset might have been intended for a Cyrix MediaGX platform. Granted, some 15 years have passed and it's quite reasonable to presume that new information is out there, but I would not be surprised to learn that such was the case. In fact, the MediaGX's mere existence as an extension of the Cyrix 5x86 core probably corroborates this conjecture; later MediaGX platforms ran the bus at 33MHz with high multiplier values (8X-9X), which is pretty indicative of why this chipset/assembly is limited to 40MHz. I still need to do some tinkering to see if 50MHz+ is possible, but I suspect not, at least not with any kind of stability. The board will not, under any circumstances, boot with the only FSB jumper configuration not described in the manual: closing J4 and leaving J5 open.

To address your questions one-by-one:

• I meant to refer to this board as the oddest board in the general 486 lineup, and corrected my post to indicate such. It's really just fascinatingly strange to see PLB L2 cache, a true single-chip implementation, and "Pentium-class technologies" (whatever that means 🤣) on a 486 board!
• I am looking into this. Apparently the TAG would not have to change. That's a win in my book. I have also seen that UM61L3264F-7 cache ICs are out there for acceptable prices. It seems like this wouldn't be too hard of a modification with some solder paste, hot air, and patience. This might be a project in the next month for me, when I anticipate having much, much more free time.
• I ran 3DSR3 this afternoon. The results were not bad: 113 seconds. I think you're onto something here. This chipset's design seems really conducive for offline compute. Perhaps some extra L2 cache will make up the difference?

I think the ALD 93C488 is pretty unique, in that it truly does not mesh well design-wise with other 486 chispets. That is to say, ALD kind of "broke the rules" and just implemented every feature at the highest level of integration possible. RTC? In the 93C488. Cache controller? Ditto. PCI/ISA bridge? Yep.

The one question I really have is whether there's a VLB implementation on this board at all. I realize that on boards such as the LSD, the IDE controller sits on the VL-Bus, even though there's no real direct exposure of said bus to the end user. I did a little digging with regards to this ALD fellow and it turns out I was initially incorrect: The onboard IDE seems to be chipset-integrated. Perhaps that's a sign that it's not VL-Bus based? I am not certain what to think. In that case, this could possibly be the of of the only known 486 chipsets that is pure PCI, and lacks any VLB implementation at all (as far as I am aware?).

If there's any other examinations you wish for me to provide, please let me know. I think upgrading to 512k L2 might be the way to go here.

For now, I decided to go ahead and give WinTune a go. I will report back shortly with an edit detailing the video results. I suspect nothing too crazy, but we shall see.

EDIT: WinTune 2 results are in. 800x600x24 yielded 12026 kPixel/sec. Not bad, but certainly there's better.

pshipkov wrote on 2023-04-16, 01:25:

great numbers. i thought i updated the charts with your top wolf3d score a while ago, but not seeing it in the images on the web […]
Show full quote

great numbers.
i thought i updated the charts with your top wolf3d score a while ago, but not seeing it in the images on the web server. will update tonight.

18.3 fps in quake 1 is for 320x240 resolution.

Max and others reported better perf with 3x50 than 4x40. i also see that one some mobos for some tests, but so far 4x40 is the better place overal.

Hi.
I switched back to my PVI-486SP3 board (you know very early revision 1.2 but still a nice board). Running at 160MHz
I was succesful with 512kb single bank cache: I found a set of 1*32kx8 + 4*128kx8, that can do fastest timings. YAY.
So two people worldwide exist who were successful with that 😁
But there was a disappointing thing: I wanted to have 64MB RAM. I have 2 times 32MB FPM 60ns. But no dice, unstable even with relaxed memory timings.
With another set of 2 times 16MB (32 total), system is stable with everything on max.
Are there 64MB modules that would work with the PVI? So I could maybe use 64MB or 128MB (with 128MB it is necessary to switch L2 to WT because of cachable area).

I played around a bit, for example Wolf 3D was ~ 105 with a PCI S3 868. Nothing special when you are used to see more than 150 in Wolf 3D (VLI @ 160 + Ark 1000VL)
My Ark 1000VL does not work (maybe I would need to disable the Turbo jumper on the Ark? Did not investigate further) on the PVI-486SP3

@WJG6260
Thanks for the additional notes and tests.
It really looks like a decent implementation with less than ideal PCI graphics performance.

---

@CoffeeOne

I remember seeing comments from at least 1 or 2 members here who also run their PVIs with tightest BIOS timings.

There are 64Mb FPM RAM modules.
I run the board with 128Mb memory.
Solid is the first word that comes to mind when i think about PVI.
Its VLB interface is much faster than the PCI for DOS interactive graphics.
Consider some good VLB card if you are after fast DOS graphics.
Ark1000VL can be picky. Setting it to 1-WS usually resolves the problems.

---

Need help with something here.

Been looking at DataExpert EXP3406.
More specifically at its IMI SC425aPB clock generator.
It is supposed to handle frequencies beyond 80MHz, but manual (attached since missing on The Retro Web) talks about 50/66/80 MHz only.
No jumpers configuration lead to anything else.
Managed to obtain diagram of the clockgen, but not sure if it is actually accurate.
On the right side is how the jumpers are connected to the pins of the chip.
I am not sure what to make out of this.
Any ideas ?

My pleasure!

I have v1.2 of this board, equipped identically but for the chipset--mine uses the OPTi 495XLC, which-from what I can tell-only adds support for Cyrix-specific L1 WB features for their 486S and 486DX2/4 series with the non-standard, non-Intel pinout. The jumper layout and other ICs are the same.

That being said, I've played around with the jumpers for the past while to no avail. I am probing at the MCLK1 and MCLK2 outputs of the clockgen with my oscilloscope to see what the deal is, as well as checking S0, S1, S2, and S3 with my logic probe. There's settings for 16-25MHz, but that's probably not of interest here.

The magic combo should be to find something that sets S0 and S2 to logic 1, S1 to logic 0, and S3 to logic 1. I found the full datasheet of the IMI SC425 series clock generators, and am attaching it here. The jumper arrangement on this board is nonsensically complicated; leave it to DataExpert to kludge something like this together...

I'll keep at it and report back.

Thanks a lot for the datasheet. Appreciate it.
Quickly skimmed through it.
Diagram i got checks-out. Also, 50, 66 and 80 MHz is an option indeed.
But the wiring of that motherboard is still a puzzle to me.
I also found the 16 and 25 MHz options by trial and error.
The interesting part is that i can change frequency on the fly by simply pulling or inserting jumpers 6/7/8.
Didn't measure voltages for that, but it feels like some voltage stepping is at play.
How this maps to the diagram i still don't get - jumpers are wired to very different pins.
Need to read the datasheet with comprehension and stare at the diagrams for some time before say anything more.

You're quite welcome! I'm glad that the datasheet proved useful.

The thing about the 50MHz, 66MHz, and 80MHz options is that this board is using them as clock-doubled inputs, divided internally by the IMI SC425, so as to feed 25MHz, 33MHz, and 40MHz FSBs for 386-class CPUs. From what I gather, most older boards do this; I know the FIC VE-V that I have requires oscillators of double-frequency so as to provide the FSB for even 486s, and it is a very early 486 board. 80MHz there feeds a 40MHz FSB.

The one thing that I did discover, based on your diagram, is that JP9 switches between the clock-doubled and non-clock-doubled output. Using my smaller oscilloscope, I probed the MCLK1 and MCLK2 pins at various frequencies. It seems that, for the 40MHz configuration, MCLK1 is 40MHz, while MCLK2 is 80MHz. If you were to switch JP9, you should be booting off of MCLK2 instead, theoretically granting an 80MHz FSB.

I tried the following configuration for a 50MHz FSB, and my board hung at POST code 13:
JP6 - OPEN
JP7 - OPEN
JP8 - OPEN
JP22 - CLOSED
JP9 - 1-2

I can't get it to move past this stage no matter what, but probing the various pins suggests that does indeed feed 50MHz through MCLK2.

I think the design might be limited to 40MHz max, unless you partially de-solder the clockgen (just the pins for S0-S3) and manually set those pins high or low.

Ok, you are step ahead with measuring fregs.
Same result here if JP9 is in 1-2 position things are not working.
So it looks like even the clockgen is producing the higher frequency, the board is not handling it well.
It will be bad if that's the case. Was hoping for 386/VLB mobo that goes higher on FSB.
Still, will put some more time into this.

I’ve been thinking about this issue and wondering if there’s something else at play.

The OPTi 495SLC and 495XLC are, from what I understand, pre-bug fixed versions of the OPTi 495SX. The -SX is a little bit different, in that it can seemingly run much tighter cache and DRAM timings out of the box. I think that the performance is pretty similar; I’ll have to test, as I have an EDOM MV008 that I repaired a while ago and that is working (but still have to clean up/finish).

The EDOM MV008’s manual specifically details a selection with regard to how the clock signal is propagated:

My guess is that either there’s another jumper/setting we are missing with regard to the weird clock generator used on the DataExpert board, or that there’s either an inherent inability for the SLC/XLC chipsets to handle a 50MHz 386—or anything over 40MHz for that matter.

There are OPTi 495SX boards that use DIP-14 full can oscillators. I suspect that outfitting one of those with a 90+MHz crystal would be the best way to net 45+MHz FSB. There’s also an -SLC board that can take DIP-14 crystals, but I think that the later 495SX chipset was implemented in more combinations, such that there are more boards capable of using full can oscillators. This 495SLC board, comparatively, seems to be one-of-one on TRW.

There is one other prevailing theory, and that is that these boards are incapable of providing the necessary signals to run the CPUs at anything above 40MHz. The limitations of the clockgen to 80MHz are perhaps the most damning facets of these DataExpert boards, and likely why they can only run the 386DX portion of the board at 40MHz maximum. To run a 386DX at 50MHz FSB, for example, the chip would demand a 100MHz FSB CLK2. I think that is probably the likely theory, as the 386DX specification calls for a CLK2 FSB input, rather than the CLK FSB input fed to the 486DX. The 486SXL/DLC chips obey the 386DX standard in PGA132 form, which seems reasonable.

The only other fix to this is a to implement a PLL-based (or CMOS-based) frequency-doubling circuit, which just doesn’t make sense. There are too many timing issues, and it’s near-impossible to propagate signals in a way that doesn’t cause bus timing issues.

An SXL2-66 or something of that sort might be an easier approach on this board. FSB overclocking might just be design-limited.

WJG6260 wrote on 2023-04-28, 17:59:

an old comment from AnonymousCoward that suggests this board's chipset might have been intended for a Cyrix MediaGX platform

Damn, I don't know how you managed to dig this one up. This must have been one of my first posts on this forum, and I don't even remember writing it.
I think most of the information I provided in that thread must have been from some old usenet posts I had been reading.

Thanks for posting your results on the ALD PCI5433. It's too bad it doesn't seem to live up to all the hype in the user manual. My board doesn't have the cache chips soldered in. I don't think I'll bother unless somebody gives me a compelling reason to do so.

Like your board, mine is also pretty unstable. Probably moreso. It's possible that the transistor is going bad, and the required 3.3V is not being delivered to the associated components. As noted, this board has cheap build quality. Unlike pretty much every other 3V 486 I've ever seen, ALD opted to go with an off the shelf transistor rather than a proper VRM. You might want to measure the outputs.

@WJG6260
Spent some more time with this board.
Pretty convinced it cannot go past the 40MHz, unfortunately.
I don't think i am missing jumpers config at this point.

At the same time this guy here, which is based on the SX variant of the chipset, ticks at 60MHz on a narrow overclock (system is unstable), or fully stable at 55MHz.
But there are so many factors at play that it is impossible to tell if the chipset itself is limited, or another component in the assembly, or the assembly itself is the problem for our SLC boards.

I guess i will be on the look for the mobos you suggested.
I think there is a decent chance they bring a surprise in terms of peak performance for 386 class hardware.

Thanks for the links. Good read.

---

DTK PKM-00395 based on SiS 85C471, 82C407 chipset.
The affordable alternative to Asus VLI-486SV2GX4 and Chicony CH-471B.
Or, better - the middle path.

I had this guy for long time.
It had a problem - couldn't recognize at all Am5x86 processors. No lights upon power-on.
Swapped its BIOS with one from Asus VLI and that was enough to get it back in action.

(Post has been updated with notes from user Feipoa)

No wiring for level 1 cache in write-back mode.
EDIT: L1 WB mode can be enabled by setting up the board for P24D CPU where jumper rows 13, 16, 17 are closed.
Insists on 3x CPU frequency multiplier.
EDIT: J38 is CLKMUL, not J29 as stated in the PKM-0039S manual available online. Use that to switch between 2x/4x and 3x.
Used an adapter to enforce L1 in WB mode and 4x multiplier.
EDIT: This is not necessary.

Supports only 3.3 and 5 volts to CPU.
Not ideal.
EDIT:
J21, which sets CPU voltage, is flipped in the manual. It should read:
5V, short 5-6 & 7-8
3-4V, short 1-2 & 4-5
Also, the unnamed jumper next to the LT1086LT voltage regulator controls the 3-4V noted above:
short 1-2: 3.4V
short 2-3: 1.65V
all open: 4.1V

Clock generator supports 50, 60, 66 MHz.
EDIT:
Frequencies in MHz (1-2, 3-4, 5-6)
20 open open open
25 open open short
33 short short short
40 open short short
50 short open open
60 open short open
66 short open short
80 short short open

EDIT:
Final jumpers' configuration for Am5x86 with VL/I BIOS, for clarity:
J13/J15/J17 ON (however, removing J13 didn't seem to have an impact)
J19 2-3 ON
J22 2-3 ON
J23 1-2 ON
J28 2-3 ON
J29 ON

Used Ark1000VL for interactive DOS graphics tests, S3 Trio64 for Windows GUI tests.
Promise EIDE2400 Plus was the local storage controller.

--- Am5x86 at 160MHz (4x40)

Mildly picky about level 2 cache chips. Took some time to curate a working set for 1Mb buffer that can handle the tightest timings at 4x40MHz.
All BIOS settings on max.

Performance is on par with Asus VLI in DOS. Slightly slower.
Similar to VLI in Windows accelerated GUI and the complex offline graphics tests.

Not bad at all.
Also, very stable.

--- Am5x86 at 180MHz (3x60)

System is unstable, regardless of BIOS timings and such.
A good compromise between perf/stability is to set DRAM SPEED to SLOWER (best is FASTEST), CACHE BURST READ = 2T (best is 1T), LOCAL BUS READY = SYNCHRONIZE (best is ASYNCHRONOUS).

Many apps and games work, but hang-ups can occur.
Windows is hard no-go.

benchmark results

Notice, this is slower than 4x40 with all settings on max.

--- Am5x86 at 200MHz (3x66)

System is very unstable.
Didn't spend much time testing it.
Frequent hangs and crashes.

---

benchmark results with Am5x86 CPU
benchmark results with P24T CPU

Great motherboard for configurations of up to 4x40MHz. Actually it works well at 3x50 too.

@CoffeeOne

Asus PVI-486SP3 1.22 is unstable at 4x50. It is the motherboard itself.
Cannot find jumper config for 60/66. Need to pull the oscilloscope, figured i should ask you if you know.

pshipkov wrote on 2023-05-07, 03:34:

@CoffeeOne

Asus PVI-486SP3 1.22 is unstable at 4x50. It is the motherboard itself.
Cannot find jumper config for 60/66. Need to pull the oscilloscope, figured i should ask you if you know.

Asus PVI-486SP3 v.1.22 and 66MHz FSB
66MHz setting is in the picture.
I don't know 60MHz, but do not have CPUs that run on 60 or 66MHz unfortunately.

Thanks for the link.
3x66 results in no lights here with the PVI board.
Most likely related to the fact that the motherboard has options for 3.45V and 3.6V only, which is insufficient for Am5x86 to work at 200MHz.
At least i don't have a CPU that can do it at below 4 volts.

pshipkov wrote on 2023-05-07, 21:17:

Thanks for the link. 3x66 results in no lights here with the PVI board. Most likely related to the fact that the motherboard has […]
Show full quote

Thanks for the link.
3x66 results in no lights here with the PVI board.
Most likely related to the fact that the motherboard has options for 3.45V and 3.6V only, which is insufficient for Am5x86 to work at 200MHz.
At least i don't have a CPU that can do it at below 4 volts.

Hello,

I am quite sure, that you can force 5 volts (disable voltage auto detection) on the PVI in the same way as on the VLI.
So you can try 5 volts with peltier cooling. I mean when you have CPUs that work well with 5 volts. Not an option for me .....

Ah, that is a great point.
Not sure why i didn't think of it, since we put good effort to determine it for the VLI board.
Thanks for the reminder.
Going to try this now.

A Continuing with the reorganization of this thread by consolidating all collected performance metrics into single chart with references to it from the individual posts.

286 class motherboards with maximum long-term stable overclock.
The intention was to sample performance and overclocking characteristics of the different 286 chipsets.
Listed boards are some of the best (or only known) implementations built around a given chipset.

Gray bar indicates peak performance achieved with the fastest motherboard/chipset and CPU upgrade with TI 486SXL2 running at 60MHz.
Tseng Labs ET4000AX video card with 1Mb RAM is the fastest graphics adapter for 286 class machines (Cirrus Logic GD-5434 is flaky or does not work at all).

Chaintech 340SCD based on SiS Rabbit - 85C310/320/330

Motherboards based on this chipset were reviewed and discussed multiple times in previous posts:
ASUS 386/33-64k
Partial test results by Feipoa of his Chaintech 340SCD here and here with IBM BL3 and TI SXL2-66 processors.
ABit AB-FS3

Naturally, decided to run the 340SCD through the grinder myself.

I have two sets of well curated 256Kb level 2 cache chips, but the board didn't like either one of them.
Felt like an one-off thing since they work everywhere else.
Took me a moment to find a working combination that scales past the standard 40MHz FSB.

For the testing used STB Nitro video card based on Cirrus Logic GD-5434 with 2Mb RAM and a standard ISA IDE controller (UMC chipset), 16Mb RAM - 4 50ns rated modules.

--- IBM BL3 at 110MHz (2x55), ISA bus at 13.75MHz

System is very unstable regardless of wait states, presence of L2 cache and/or FPU - usually factors that make things worse.

Was able to capture 2 results.

1Wolf3D: 62.5 fps
2Superscape: 47.6 fps

--- IBM BL3 at 100MHz (2x50), ISA bus at 12.5MHz

System is fully stable.
Motherboard loves this CPU.

All BIOS settings on max, except:
BUS CLOCK SELECT = SCLK/8 (best is /5)
DRAM READ CAS WAIT STATE = 3 W/S (best is 2)

Ok in interactive graphics test, pretty good in FPU intensive tasks.
Unfortunately the very sensitive offline rendering test LightWave3D required inflated wait states for successful pass.

--- TI 486SXL2 at 90MHz (2x45), ISA bus at 15MHz
--- TI 486SXL2 at 80MHz (2x40), ISA bus at 13.33MHz

System is inherently unstable no matter what.
I had similar problem with the ABit AB-FS3 board, but it was much less pronounced. There 80MHz was decently ok. Many tests pass and so on.
For some reason these boards don't like my SXL2-66 CPU and/or the 2 interposers.
At the same time the SXL2-66 CPU works just fine in other boards (at up to 80MHz, never stable at 90MHz).
Really weird. Not sure what to make out of it.
My test bench PSU maxes out at 4.25V on the 5V rail, so maybe that's what's tripping it. To be verified at some point later.

--- TI 486SXL2-50 (PGA132) at 45MHz, ISA bus at 15MHz

System is fully stable.

All BIOS settings on max, except:
BUS CLOCK SELECT = SCLK/6 (best is /5)
DRAM READ CAS WAIT STATE = 3 W/S (best is 2)

Speedsys produces jumbled text and graphics which is often the case with SXL2 processors.

ABit AB-FS3 is able to run with SXL2 CPU at 50MHz, so it slightly edges this board.

--- AMD 386DX at 45MHz, ISA bus at 15MHz

System is fully stable.

All BIOS settings on max, except:
BUS CLOCK SELECT = SCLK/6 (best is /5)

ABit AB-FS3 and ASUS 386/33-64k are able to run with 386DX CPU at 50MHz, which contributes to better performance than this board.

---

benchmark results

Not a bad motherboard overall.
Works significantly better with BL3 processor than SXL2 and 386DX. A bit unusual, but hey, i take it.

Looking at your chart, I see that you were able to achieve up to 23.8 fps in DOOM using the BL3 at 2x50 and GD-5434 with Chaintech 340SCD. Using the same hardware, I have in my notes that I got my board up to 24.0 fps (3112 realtics) at 12.5 MHz ISA. Did you also notice that increasing the ISA clock rate further, for example to 16.7 Mhz, worsened the results slightly?

The difference in our frame rates in DOOM may be due to you running the DRAM Read CAS at 3 ws. Were you not able to find 4 MB sticks would worked stable at 2 ws? Were you finding 2 ws almost stable, or crashing right off the bat?

I'm puzzled by your BL3 results at 2x45. My notes indicate 3165 realtics, or 23.6 fps, while yours were only 21.4 fps. It may be related to your ISA speed. I noticed for this particular FSB, that 15 MHz to the ISA yielded the best results. For each new FSB and CPU speed, I had to run the full range from 10 Mhz to 16.7 MHz to see which yielded the best result; it wasn't always the faster frequency.